This invention relates to programmable controllers for sequential controls of assembly lines, and methods of controlling the same.
FIG. 1 is a block diagram showing the organization of a conventional programmable controller. The programmable controller includes: a CPU 101; a ROM 103 for storing an operating system program, etc.; a work RAM 105 for storing temporary data; a user memory 107 for storing a user program for effecting a sequential control; a data RAM 109 for storing device information utilized in the user program; a buffer 111 for connecting the first interior bus 114 and the input/output bus 116; and input/output circuits 113 to which various controlled devices (not shown) are connected.
The operation of the programmable controller of FIG. 1 is as follows.
FIG. 2 is a flowchart showing the operation of the programmable controller of FIG. 1. The user program prepared by means of a programming device (not shown) is stored in the user memory 107 via an interface (not shown) for peripheral devices. Thus, when the power source (not shown) is turned on, the operating system stored in the ROM 103 starts to operate in accordance with the user program stored in the user memory 107.
Namely, the ON/OFF information of the limit switches etc. (not shown) coupled to the input/output circuits 113 are read out as the input information. The input information thus read out is stored as an input image in the data RAM 109. This is effected at the input refreshing step S1101.
Next, at step S1102, the operations indicated by the user program stored in the user memory 107 are executed successively by the CPU 101 in accordance with the input image stored in the data RAM 109. The results of operations executed by the CPU 101 are stored in the data RAM 109 as the output image information.
When the user program terminates, the count-up operations of the timers (not shown) and the counters (not shown) are executed as the end operations at step S1103. After these end operations are completed, the output image information stored in the data RAM 109 is written to the output portion of the input/output circuits 113 at the output refresh step S1104, such that the ON/OFF operations of the motors and solenoids coupled to the output portions of the input/output circuits 113 are controlled.
The above operations are executed repeatedly, such that the devices of the assembly lines, etc., are controlled by the programmable controller.
By the way, the input/output bus 116 to which the input/output circuits 113 are coupled are formed of external cables extending around in the environment, and hence are easily affected by the exterior environment. Thus, the accesses thereto must generally be slow. The conventional programmable controller thus has the disadvantage that the access speed to the input/output bus 116 is limited. This impairs the overall operation speed of the programmable controller.